1. Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device, and in particular, it relates to a semiconductor device in which element isolation is achieved by an oxide film and a method for manufacturing the semiconductor device.
2. Description of the Related Art
While the degree to which integration is achieved improves as semiconductor elements become smaller, element isolation must be considered as one of the factors that determine the degree of integration. The element isolation is an essential step performed in the semiconductor manufacturing process, and typical technologies adopted in the element isolation include the LOCOS focal oxidation of silicon) method and the trench method. In the LOCOS method, a thermally oxidized film formed by selectively oxidizing a semiconductor substrate is used as an element isolation area.
The trench isolation structure achieved through the trench method has been in use as a basic isolation structure for more than 10 years in the area of high speed bipolar type LSI devices. In addition, in recent years, STI (shallow trench isolation), which is a type of trench method, has been employed in the CMOS (complimentary metal-oxide semiconductor) logic and memory. STI, which prevents the formation of bird""s beak present in the LOCOS structure in the prior art, eliminates superfluous conversion difference. As a result, advantages such as a great improvement in the degree to which elements can be integrated are achieved.
An example of the trench isolation structure in the prior art is now explained in reference to FIG. 9.
First, an exposed front portion of a surface of an element substrate 801 constituted of silicon is thermally oxidized to approximately 3000 angstrom to form a thermally oxidized film 802 as illustrated in FIG. 9(A). Next, a resist pattern is formed through regular photolithography technology and then, by using this resist pattern as a mask, the thermally oxidized film 802 is patterned as illustrated in FIG. 9(B).
Then, after removing the resist pattern, opening portions are anisotropically etched using the thermally oxidized film 802 as a mask to form a trench 801a as illustrated in FIG. 9(C). Next, by thermally oxidizing the side walls of the trench 801a to approximately 500 angstrom, a thermally oxidized film 803 is formed as illustrated in FIG. 9(D). In the next step, the trench is completely embedded, as illustrated in FIG. 9(E) by depositing a film 804 achieving outstanding coverage, which may be constituted of a low pressure CVD (LFCVD: low pressure chemical-vapor deposition) film over the entire surface of the substrate.
Then, if it is necessary to achieve global planarization due to varying gap intervals, as in the case when STI is adopted, planarization is implemented through CMP (chemical mechanical polishing). If, on the other hand, there are only narrow constant gap intervals present, the oxide film is etched back and flattened through dry etching of the oxide film to complete the isolation process, as illustrated in FIG. 9(F).
Through the process described above, a full-depth trench isolation structure with hardly any conversion difference is formed. As a result, it becomes possible to achieve higher integration in a single layer and to reduce the parasitic capacity of the elements, the wiring capacity and the like, to result in a great advantage in realizing higher speed.
It is to be noted that trench structures such as STI differ from the structure employed in high speed bipolar devices in that the edges of the trenches are formed in extreme proximity to active areas. Because of this, the trench structure and the process for forming the trench greatly affects the characteristics of the active elements. What affects the characteristics of the active elements to the greatest degree is stress attributable to the trench structure and the formation process, and it presents a significant obstacle to the production of elements. The causes of such stress are primarily divided into stress factors attributable to the material characteristics of, mainly, the trench filler material, and stress factors occurring when oxidizing the right angle edges at the upper end of the trench that are seen when viewing the trench from the sectional direction.
The shape of the oxide film resulting from the concentrated stress occurring when thermally oxidizing the vicinity of the edges of a trench is explained in reference to FIG. 10. When the thermally oxidized film 802 is formed by thermally oxidizing the element substrate 801 in which the trench has been formed at 1000 centigrade, the thickness of the oxide film is locally reduced in the vicinity of the edge 802a of the trench due to the concentration of stress occurring during the thermal oxidization resulting in the corner of the element substrate becoming even sharper. Such concentration of stress may result in an increase in the leak current of an MOS transistor formed in the vicinity or a crystal defect such as dislocation occurring during a subsequent heat treatment. Since they are caused by the corner of the element substrate being a sharp angle, it is necessary to improve upon its shape.
An object of the present invention, which has been completed by addressing the problems of the semiconductor devices in the prior art discussed above, is to provide a new and improved semiconductor device in which the shape of the element substrate that is affected by the thermal oxidation is improved to reduce the degree to which stress concentrates at the element substrate and a method for manufacturing this semiconductor device.
In order to achieve the object described above, in a first aspect of the present invention, a semiconductor device adopting a structure in which one active area formed on an element substrate is electrically isolated from another active area, that is characterized in that a groove-like area is formed between the one active area and the other active area with the groove-like area constituted of a side wall extending roughly vertical to the front surface of the element substrate and an inclined surface formed in the vicinity of the upper portion of the side wall at an angle larger than 90 degrees relative to the side wall, is provided.
In order to sent the angle formed by the side wall and the inclined surface larger than 90 degrees, the side wall may be, for instance, a surface {111} of the element substrate.
In this structure, the shape of the corner portion formed at the upper end of the trench is widened so that the angle formed by the side wall and the surface {111} is approximately 144.7 degrees, resulting in a great reduction in the concentration of stress at the corner portion occurring during the thermal oxidation. As a result, a reduction in the leak current is achieved and any crystal defects can be prevented, to achieve a great improvement in yield.
In addition, in a second aspect of the present invention, a method for manufacturing a semiconductor device adopting a structure in which one active area formed on an element substrate is electrically isolated from another active area, that includes a first step in which a groove-like area is formed at the element substrate through a treatment performed on the area between the one active area and the other active area under conditions whereby the etching rate on the surface {100} is higher than the etching rate on the surface {111} and a second step in which the bottom surface of the groove-like area is etched through anisotropic etching, is provided.
It is to be noted that the first step may be implemented under conditions whereby the etching rate on the surface {100} is essentially double or more than double the etching rate on the surface {111}, e.g., within a hydrogen gas atmosphere containing hydrogen chloride gas at a temperature of 800 centigrade or lower.
By adopting this manufacturing method, the semiconductor device achieving outstanding advantages described above can be manufactured with ease.
Furthermore, in a third aspect of the present invention, a method for manufacturing a semiconductor device adopting a structure in which one active area formed on an element substrate is electrically isolated from another active area, that includes a first step in which a groove-like area is formed at the element substrate by performing a treatment on the area between the one active area and the other active area under conditions whereby the etching rate on the surface {100} is essentially the same as the etching rate on the surface {111}, a second step in which etching is performed on the groove-like area under conditions whereby the etching rate on the surface {100} is higher than the etching rate on the surface {111} and a third step in which the bottom surface of the groove-like area is etched through anisotropic etching, is provided.
It is to be noted that the first step may be implemented within a hydrogen gas atmosphere containing hydrogen chloride gas at a temperature of 900 centigrade or higher. In addition, the second step may be implemented under conditions whereby the etching rate on the surface {100} is essentially double or more than double the etching rate on the surface {111}, e.g., within a hydrogen gas atmosphere containing hydrogen chloride gas at a temperature of 800 centigrade or lower.
By adopting this manufacturing method, in which side etching is performed under isotropic etching conditions that achieve side etching with a high degree of efficiency and then a treatment is performed under highly anisotropic conditions, advantages are achieved in that the degree of freedom for controlling the depthwise direction and the side etching quantity increases and in that the length of time required for the treatment is reduced.
Moreover, in a fourth aspect of the present invention, a method for manufacturing a semiconductor device adopting a structure in which one active area formed on an element substrate is electrically isolated from another active area, that includes a first step in which a first insulating film and a second insulating film, the film quality of which is different from that of the first insulating film, are formed in the area between the one active area and the other active area, a second step in which a groove-like area is formed at the element substrate through a treatment performed on the area between the one active area and the other active area under conditions whereby the etching rate on a surface {100} is higher than the etching rate on a surface {111}, a third step in which the bottom surface of the groove-like area is etched through anisotropic etching, a fourth step in which side etching is performed on the first insulating film and a fifth step in which a corner portion formed at a boundary of the surface {100} and the surface {111} inside the element substrate is rounded off, is provided.
It is to be noted that the first insulating film may be a thermally oxidized film formed through thermal oxidation. In addition, the second step may be implemented under conditions whereby the etching rate on the surface {100} is essentially double or more than double the etching rate on the surface {111}, e.g., within a hydrogen gas atmosphere containing hydrogen chloride gas at a temperature of 800 centigrade or lower. Furthermore, the fifth step may be implemented by performing a heat treatment within a high purity hydrogen gas atmosphere or within a hydrogen gas atmosphere containing hydrogen chloride gas.
By adopting this manufacturing method, the corner portion at the boundary of the side wall and the surface {111} at the element substrate is further rounded off to further reduce the degree to which stress concentrates.
In addition, in a fifth aspect of the present invention, a method for manufacturing a semiconductor device adopting a structure m which one active area formed on an element substrate is electrically isolated from another active area, that includes a first step in which a first insulating film and a second insulating film, the film quality of which is different from that of the first insulating film, are formed in the area between the one active area and the other active area, a second step in which a groove-like area is formed in the area between the one active area and the other active area through anisotropic etching, a third step in which side etching is performed on the first insulating film and a fourth step in which a corner portion formed at the boundary of a surface {100} and a surface {111} is rounded off, is provided.
It is to be noted that the first insulating film may be a thermally oxidized film formed through thermal oxidation, and the fourth step may be implemented by performing a heat treatment within a high purity hydrogen gas atmosphere or within a hydrogen gas atmosphere containing hydrogen chloride gas.
By adopting this manufacturing method, the etching process can be implemented in the simplest, most convenient manner when the corner portion does not have to be rounded off to a great degree, such as when the film thickness of the thermally oxidized film is approximately 300 angstrom or less.
In a sixth aspect of the present invention, a semiconductor device adopting a structure in which one active area formed on an element substrate is electrically isolated from another active area, that is characterized in that a groove-like area is formed between the one active area and the other active area with the side wall of the groove-like area constituted of a surface {111} and the groove-like area covered with an insulating film, is provided.
The semiconductor device described above may be manufactured with ease by adopting the following manufacturing method. Namely, in a seventh aspect of the present invention, a method for manufacturing a semiconductor device adopting a structure in which one active area formed on an element substrate is electrically isolated from another active area, that includes a first step in which a first insulating film and a second insulating film, the film quality of which is different from that of the first insulating film, are formed in the area between the one active area and the other active area, a second step in which a groove-like area is formed at the element substrate through a treatment performed on the area between the one active area and the other active area under conditions whereby the etching rate on a surface {100} is higher than the etching rate on a surface {111}, and a third step in which the groove-like area is thermally oxidized is provided.
It is to be noted that the second step may be implemented under conditions whereby the etching rate on the surface {100} is essentially double or more than double the etching rate on the surface {111}, e.g., within a hydrogen gas atmosphere containing hydrogen chloride gas at a temperature of 800 centigrade or lower.
By adopting this manufacturing method, the shape in the vicinity of the bird""s beak is greatly improved and, in addition, a thick field oxide film that will further reduce the wiring capacity and the like can be formed with a greater degree of effectiveness.
In an eighth aspect of the present invention, a method for manufacturing a semiconductor device adopting a structure in which one active area formed on an element substrate is electrically isolated from another active area, that includes a first step in which a first insulating film and a second insulating film, the film quality of which is different from that of the first insulating film, are formed in the area between the one active area and the other active area, a second step in which a groove-like area is formed at the element substrate through a treatment performed on the area between the one active area and the other active area under conditions whereby the etching rate on a surface {100} is higher than the etching rate on a surface {111}, and a third step in which the groove-like area is filled with a third insulating film, is provided.
It is to be noted that the second step may be implemented under conditions whereby the etching rate on the surface {100} is essentially double or more than double the etching rate on the surface {111}, e.g., within a hydrogen gas atmosphere containing hydrogen chloride gas at a temperature of 800 centigrade or lower.
By adopting this manufacturing method, in which a thick thermally oxidized film is not formed, advantages are achieved in that there is no conversion difference which would otherwise result from the presence of a thick thermally oxidized film and that stress is greatly reduced. For this reason, it is a particularly effective manufacturing method to be adopted when forming an active element in the vicinity.
It is to be noted that in this specification and the attached drawings, the xe2x80x9csurface {100}xe2x80x9d collectively refers to the same type of crystal surfaces having different directionality, e.g., a surface (001), a surface (010) and the like.